The present invention relates to a method of making a semiconductor device with a PN junction.
As well known, most of methods of making semiconductor devices with PN junctions employ planar techniques using a silicon wafer as a starting material. In accordance with the planar technique, a silicon oxide (SiO.sub.2) film is formed on a surface of the silicon wafer through the thermal oxidation thereof in an atmosphere containing oxygen. By use of diffusion technique, a junction structure is formed in which a PN junction extends beneath the SiO.sub.2 film and to the silicon wafer surface at its edges.
Such a method using the planar technique has an advantage that the SiO.sub.2 film formed on the silicon wafer surface serves as both a surface protection film and a mask for preventing the penetration of impurities into the junction structure. On the other hand, it has been required that recent semiconductor devices must have high performance, high reliability and high integration density. Correspondingly, the manufacture process has been complicated and it has been required to form fine structures with higher accuracy. Moreover, the produced device must have correct characteristics. Attempts to such requirements have revealed that the formation of the SiO.sub.2 film provides a factor which limits various characteristics of the device.
A great problem is that in forming the SiO.sub.2 film on the silicon wafer surface a "stacking fault" is produced at the interface between the SiO.sub.2 film and the silicon wafer and in the silicon wafer. In general, a "stacking fault" is known as a defect in a crystal in which there is a change from the regular sequence of positions of atomic planes. The stacking fault increases or grows through heat treatments during the manufacture process, thereby deteriorating the geometry of the formed PN junction, the electrical characteristics thereof (especially, breakdown voltage, leakage current characteristic and noise characteristic) and the yield in production.
Various approaches have been made to solve the problem of stacking fault. However, no sufficient solution has been attained. On the other hand, the increasing requirement for higher integration density is imposed upon recent semiconductor devices or integrated circuits. Further, the requirement for linear integrated circuits is directed to low noise and the improvement of reliability. It is accordingly urgent to provide a silicon wafer with its improved characteristics of crystal.